What exactly is a memory bank? | Tom's Hardware Forum
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A memory bank is a functionally independent memory device that is constructed in parallel with other banks in order to increase the ... Menu Menu Forums Login Register Sidebar Blog Categories Category1 Category2 Category3 Category4 Categories Category1 Category2 Category3 Category4 SupportUI.X Donate Contactus MainLinks Forums articles Interviews Menu Featured Home Forums Newposts Trending Searchforums What'snew Newposts Newprofileposts Latestactivity Members Currentvisitors Newprofileposts Searchprofileposts Billboard Trophies CatchtheTom'sHardwareShowonThursday,November4at3PMEastern! Whatexactlyisamemorybank? Threadstarter Loading000 Startdate Jan13,2017 Sidebar Forums Hardware Memory Previous Next Sortbyvotes L Loading000 Commendable Mar12,2016 22 0 1,510 0 Iamwonderingwhatisamemorybankandwhatexactlyitdoes?Doesiteffectraminanyway? 0 P Pinhedd Champion Moderator Aug7,2007 10,344 19 56,965 1,847 Loading000: Iamwonderingwhatisamemorybankandwhatexactlyitdoes?Doesiteffectraminanyway? Amemorybankisafunctionallyindependentmemorydevicethatisconstructedinparallelwithotherbanksinordertoincreasethethroughputofthememoryarchitecture. ManytypesofRAMandevensomenon-volatilestorageusemultiplememorybanks.ForthepurposesofkeepingthingsbriefandnotoverlytechnicalI'lldetailhowmemorybanksworkinDDR3andDDR4SDRAM. AllDDR3chipscontaineightfullyindependentmemorybankstiedtoasharedIOinterface.A4gigabitDDR3die(thelargestcapacityproduced)isactuallyconstructedfromeight512megabitmemorybanks.Duringoperation,eachrankhasonerowopenfromalloftherowsinitsownmemory;amemorybankcannotopenarowinanotherbank'smemory.Whenacommandissenttotheselectedrank,theBankAddressisusedtodeterminewhichmemorybankthecommandistobesentto.Thechip'sinternaldecodingcircuitrytakescareoftherest.SincetheIObusisshared,caremustbetakentoavoidsendingcommandstobankssuchthattheresultsmayoverlap. Considerthefollowing: ACPUcontainsasingledual-channelDDR3SDRAMcontroller. EachmemorychannelispopulatedbytwoDIMMs. EachDIMMcontainstworanks. Eachrankisconstructedfrom4gigabitDDR3SDRAMchips. Now,letsdosomemath. <2DIMMsperchannel>*<2ranksperDIMM>=4ranksperchannel <4ranksperchannel>*<8banksperrank>=32banksperchannel.Sinceeachbankhasitsownopenrow,morebanksisbetter! <8kilobitsperrow>*<65,536rowsperbank>=512megabitsperbank <512megabitsperbank>*<8banksperdie>=4gigabitsperdie <64IObitsperrank>/<8IObitsperdie(inthisexample)>=8chipsperrank <8chipsperrank>*<1dieperchip>*<4gigabitsperdie>=32gigabitsperrank <32gigabitsperrank>/<8bitsperbyte>=4gigabytesperrank <4gigabytesperrank>*<2ranksperDIMM>=8gigabytesperDIMM <8gigabytesperDIMM>*<2DIMMsperchannel>=16gigabytesperchannel <16gigabytesperchannel>*<2channels>=32gigabytesinstalled Sinceeachbankhasonerowoutof65,536open,thememorycontrollermustknowtheprecisestateofeachbankunderitscommand.Thegreaterthenumberofbanksinstalled,thegreaterthelikelihoodthatthememorycontrollerwillbeabletoreorderandscheduleacommandwithouthavingtoopenanewrowonabank,whichisatimeconsumingtask. DDR4worksslightlydifferently.WhereasDDR3haseightfullyindependentbanks,DDR4hasfourfullyindependentbankgroups,witheachbankgrouphavingfoursemi-independentbankswithinit.TheprincipleandmathematicsbehinditarethesamebutDDR4hasadditionaltimingconstraintsnotpresentinDDR3. 1 LilDog1291 Honorable Jan9,2013 313 0 10,960 56 Canyouprovideanexampleofwhatyoumean?Alinkorasourcethatyou'reseeing? 0 nzalog Respectable BANNED Jan2,2017 541 0 2,160 61 Prettysureitjustawaytogroupmemory. Youcouldsaydimm1and3arebank1anddimm2and4arebank2. Idon'tthinkit'sahighlytechnicaltermandcanbeusedindifferentwaysandevenpairedornotpairedatall. 0 Eximo Titan Ambassador May27,2010 20,033 1,382 90,040 4,476 Memorybankisaprettygenericterm,itcouldbereferringtotheRAMitself. 0 Flyfisherman Distinguished May29,2012 1,106 2 19,965 238 Hi, Ithinkthiswillexplainwhatamemorybankis:Techopedia:MemoryBank Yes,itwillinsomecircumstancesuseabitofYourRAM,dependingofwhatYou'retalkingabouthere. BestregardsfromSweden 0 Eximo Titan Ambassador May27,2010 20,033 1,382 90,040 4,476 nzalog: Prettysureitjustawaytogroupmemory. Youcouldsaydimm1and3arebank1anddimm2and4arebank2. Idon'tthinkit'sahighlytechnicaltermandcanbeusedindifferentwaysandevenpairedornotpairedatall. Normallythesearereferredtoaschannels.Ithinkthebankwouldapplytoalloftheslotstakenasawhole.Butwearegettingdownintosemanticsandnotanyrealdefinition. 0 nzalog Respectable BANNED Jan2,2017 541 0 2,160 61 Eximo: nzalog: Prettysureitjustawaytogroupmemory. Youcouldsaydimm1and3arebank1anddimm2and4arebank2. Idon'tthinkit'sahighlytechnicaltermandcanbeusedindifferentwaysandevenpairedornotpairedatall. Normallythesearereferredtoaschannels.Ithinkthebankwouldapplytoalloftheslotstakenasawhole.Butwearegettingdownintosemanticsandnotanyrealdefinition. Beingthat"memorybank"isnotreallyahighlytechnicalterm,anentirememorychannelorentiredimm,orallthememorycouldallbeconsideredamemorybanksinceevenadimmismadeupacollectionofmemorychips. Itmakesmoresenseformassiveserversthathave8orsoaddoncardsthathave10dimmseachonthem.You'dcallthefirstaddoncardbank1orsomethinglikethat.It'sjustdoesn'tmeananythingspecific. Ithinkthebestwaytosumitupisagroupingofmemory. 0 Eximo Titan Ambassador May27,2010 20,033 1,382 90,040 4,476 Notanexpansivewikipediaarticlewithonlyasinglereference,soIreallywouldn'tcallitdefinitive.I'mtoolazytolookupthesourcematerial. Butsimilartermsareusedinotherfields.Capacitorbank.Asinglecapacitormadeupofmanycapacitorsinparallel. Batterybank,typicallyabatteryusedtochargeotherbatteries.Thoughitalsoreferstoagroupingofbatteries(whichthemselvescouldbecalledcellbanksifyouwantedtogetfancy) Ithinkweusedtohavea286or386thattookanadd-incardfullof30-pinSIMMs.Probablyjustcalleditamemoryexpansioncardthough.Alsohadmotherboardsthattookextendedmemorymodulesbeforeonboardlevel2cachewasathing. 0 bloodroses Distinguished Jan27,2013 672 14 19,165 56 It'saplacetostoreyourRAMsoyougaininterestoffofit. Butseriously,itcanrefertomultiplethings.WhenIwastakingprogrammingclasses,itwasatermusedforthe'reserved'sectionofmemorythatwewereeitherallowedornotallowedtowriteto.Samewithclustersofmemorybasedonthesamehighestbitvalue. Onmotherboards,I'veheardthetermusedtoreferencethegroupslotsusedfordualandquadchannelmemory. WiththeoldSoundBlasteraudiocards,itwastheRAMusedtostoreMIDIsamples. Therearemanyotherexamples. 0 P Pinhedd Champion Moderator Aug7,2007 10,344 19 56,965 1,847 Loading000: Iamwonderingwhatisamemorybankandwhatexactlyitdoes?Doesiteffectraminanyway? Amemorybankisafunctionallyindependentmemorydevicethatisconstructedinparallelwithotherbanksinordertoincreasethethroughputofthememoryarchitecture. ManytypesofRAMandevensomenon-volatilestorageusemultiplememorybanks.ForthepurposesofkeepingthingsbriefandnotoverlytechnicalI'lldetailhowmemorybanksworkinDDR3andDDR4SDRAM. AllDDR3chipscontaineightfullyindependentmemorybankstiedtoasharedIOinterface.A4gigabitDDR3die(thelargestcapacityproduced)isactuallyconstructedfromeight512megabitmemorybanks.Duringoperation,eachrankhasonerowopenfromalloftherowsinitsownmemory;amemorybankcannotopenarowinanotherbank'smemory.Whenacommandissenttotheselectedrank,theBankAddressisusedtodeterminewhichmemorybankthecommandistobesentto.Thechip'sinternaldecodingcircuitrytakescareoftherest.SincetheIObusisshared,caremustbetakentoavoidsendingcommandstobankssuchthattheresultsmayoverlap. Considerthefollowing: ACPUcontainsasingledual-channelDDR3SDRAMcontroller. EachmemorychannelispopulatedbytwoDIMMs. EachDIMMcontainstworanks. Eachrankisconstructedfrom4gigabitDDR3SDRAMchips. Now,letsdosomemath. <2DIMMsperchannel>*<2ranksperDIMM>=4ranksperchannel <4ranksperchannel>*<8banksperrank>=32banksperchannel.Sinceeachbankhasitsownopenrow,morebanksisbetter! <8kilobitsperrow>*<65,536rowsperbank>=512megabitsperbank <512megabitsperbank>*<8banksperdie>=4gigabitsperdie <64IObitsperrank>/<8IObitsperdie(inthisexample)>=8chipsperrank <8chipsperrank>*<1dieperchip>*<4gigabitsperdie>=32gigabitsperrank <32gigabitsperrank>/<8bitsperbyte>=4gigabytesperrank <4gigabytesperrank>*<2ranksperDIMM>=8gigabytesperDIMM <8gigabytesperDIMM>*<2DIMMsperchannel>=16gigabytesperchannel <16gigabytesperchannel>*<2channels>=32gigabytesinstalled Sinceeachbankhasonerowoutof65,536open,thememorycontrollermustknowtheprecisestateofeachbankunderitscommand.Thegreaterthenumberofbanksinstalled,thegreaterthelikelihoodthatthememorycontrollerwillbeabletoreorderandscheduleacommandwithouthavingtoopenanewrowonabank,whichisatimeconsumingtask. DDR4worksslightlydifferently.WhereasDDR3haseightfullyindependentbanks,DDR4hasfourfullyindependentbankgroups,witheachbankgrouphavingfoursemi-independentbankswithinit.TheprincipleandmathematicsbehinditarethesamebutDDR4hasadditionaltimingconstraintsnotpresentinDDR3. Youmustloginorregistertoreplyhere. Share: Facebook Twitter Reddit Tumblr WhatsApp Email Link Threadstarter Similarthreads Forum Replies Date QuestionSuggestionforMemory? Memory 10 Yesterdayat10:25PM T Question2or4sticksonaMSIMPGX570GAMINGEDGEWIFI Memory 1 Fridayat1:41PM S QuestionMemoryforRyzen5900X Memory 8 Fridayat12:18PM K QuestionMemorycache Memory 2 Fridayat8:31AM S [SOLVED]Whatfactorscontributetoamemoryleak? Memory 10 Wednesdayat10:03PM [SOLVED]AsusROGG752VSKMemoryUpgradeDDR43200onlyrunningat1600Mhz Memory 8 Tuesdayat2:34AM QuestionDoRyzen9CPUstakeadvantageofRAMspeedoutofthebox? Memory 5 Oct30,2021 G QuestionWhatssdisgoodforthismotherboard? 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延伸文章資訊
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